8051 Microcontroller Architecture

When learning about a new microcontroller, understanding the internal hardware is a crucial part. With Arduino UNO (or other similar hardware), people are often accustomed to the ‘Learn Through Programming’ approach. This is okay from an application/firmware developer POV. However, from a system designer POV, it is better to learn the hardware first and then deal with programming later. When you understand how a ‘Microcontroller’ interacts with different peripherals, how it processes data, your job as an embedded system designer becomes easy. This is true even for simple microcontrollers such as the 8051. That is why, learning the 8051 Microcontroller Architecture at the beginning is the key.

So, in this guide, I will discuss the basics of Computer Architecture, different types of computer architectures (applicable to Microcontrollers as well), and the 8051 Microcontroller Architecture.

In the previous guides, I gave a brief Introduction to 8051 Microcontroller and its Pin Diagram (and Pin Description). Check those guides before proceeding further.

What is Computer Architecture?

A Computer Architecture defines the structure and design of a computer system and its subsystems (the CPU, Memory, and I/O are the main three).

CPU

The design of the Central Processing Unit or the CPU starts with the design of the Instruction Set, the collection of instructions that the CPU will execute. In the world of general purpose computers, we often hear the term ‘x86’ in the context of CPUs. Here, the term ‘x86’ refers to the Instruction Set and when a CPU is designed to execute these instructions, we call that CPU ‘x86 Compatible CPU’ or simply an ‘x86 CPU.’

Since the design of a CPU is tightly-bound to the Instructions they execute, the term Instruction Set Architecture (ISA) became popular. It is an abstract way to define how instructions (and thereby the software) control the CPU (the hardware). ISA is responsible for defining the instructions, data types, memory addressing modes, and even the I/O (input/output) model.

The Instruction Set will directly impact the design of the CPU and its components. Here’s a quick look at all the essential parts of a CPU that are designed the way they due to the instruction set:

  • ALU (Arithmetic and Logic Unit) is the central component of the CPU that performs all the arithmetic and logical computations.
  • Registers that hold the operands during execution of instructions.
  • CU (Control Unit) is responsible for smooth flow of data between different peripherals and essentially controls the flow of execution of instructions.
  • Internals Buses help connect all the components inside a CPU and allow them to communicate.

Memory and I/O

The Memory Unit of a Computer System is the next important part of a Computer Architecture. Memories are responsible for storing programs (instructions). The CPU will fetch instructions from Memory and execute them one-by-one.

So, the communication between the CPU and Memory is a critical part of the whole computer system. The Computer Architecture (or rather the ISA) will define how the CPU interacts with different types of memories (RAM and ROM) to transfer instruction and data.

The design of the Input/Output subsystem will define how the CPU communicates with the other peripherals and also how to communicate the results of computation to the end user.

What About Microcontrollers?

In the previous discussion, I spoke about computer systems and computer architecture. But what microcontrollers and microcontroller architecture?

If you remember, I spoke about microprocessors, microcontrollers, and computer systems in the previous ‘Introduction to 8051 Microcontroller’ guide. From that discussion, it must be clear that a microcontroller-based system is just a scaled down version of a microprocessor-based system and they both are essentially computer systems in general. Microcontrollers have a CPU, they interact with memories to fetch and execute instructions, and use the I/O system to communicate with the outside world.

So, the discussion of computer architecture and how instructions define the design of a CPU is also applicable to microcontrollers. The only difference is the complexity of the instructions as well as the hardware that will execute those instructions.

In the case of the 8051 Microcontroller, we know that the Architecture is known as MCS-51. Actually, the ‘MCS-51’ is the Instruction Set developed by an Intel engineer John H. Wharton and the design of the 8051 Microcontroller is a result of that instruction set.

CISC and RISC Architectures

Since we are talking about Instructions and Instruction Sets, there is another way to classify Computer Architectures (or Microcontrollers) based on the type and number of instructions. They are:

  • CISC (Complex Instruction Set Computer)
  • RISC (Reduced Instruction Set Computer)

Before the development of high-level programming languages, the majority of the programs for microcontroller/microprocessors were written in assembly. As a result, CPU designers had to create a lot of powerful instructions that would perform different kinds of work. We also got instructions with several addressing modes for arithmetic, logical, and data transfer operations. Such architectures are known as Complex Instruction Set Computer or CISC.

In CISC Architecture, the CPU needs a smaller number of instructions to successfully create a proper program. However, due to the complexity of the instructions, the number of CPU Cycles for executing a single instruction is much higher.

The 8051 Microcontroller (or rather the MCS-51) is an example of a CISC Architecture.

In contrast, a Reduced Instruction Set Computer or RISC Architecture has a small and limited instruction set and the CPU can execute these instructions in one or two machine cycles.

The advantage of such a small instruction set that can perform few operations is that the hardware requirements are less (especially for Instruction Decoder). As a result, the overall performance is high as the time to execute instructions is significantly less (even though the number of instructions per program is much higher).

RISC Architecture Instructions have fewer addressing modes, only load/store instructions to access memory, and a complex compiler design.

Microchip’s PIC Microcontrollers and ARM Architecture (which are slowly becoming the dominant format) are examples of RISC Architecture.

Different Types of Microcontroller Architectures

From the discussion so far, it is clear that the communication between the CPU and the memory is the key for successful execution of instructions. In the context of microcontrollers, the ROM or the Program Memory stores the instructions and data while the RAM or Data Memory acts as a temporary storage of data while the CPU is performing some computations.

We can classify Microcontrollers into two types depending how the CPU and Memories communicate. They are:

  • von Neumann Architecture
  • Harvard Architecture

von Neumann Architecture

In a von Neumann Computer Architecture (also known as Princeton Architecture), a common memory component stores both the Program (Instructions) and Data. A single memory storage has two memory spaces for instructions and data.

von-Neumann-Architecture

Let us not get into the controversies of naming it ‘von Neumann’ Architecture after John von Neumann, even though John Mauchly and J. Presper Eckert are the main contributors (of the EDVAC, which is the basis for the single-memory, stored-program architecture).

Since both the ‘Program’ and ‘Data’ are on the same memory storage, the CPU needs only one bus to read both instructions and data. Technically there are two buses, one for data and one for address but they can carry either instructions (from Program Memory) or Data (Data Memory) at a time.

While this simplifies the architecture a lot, there is one major problem with the ‘von Neumann’ Architecture. The CPU can read either instructions or data from the memory at a time. This architecture will not support fetching the instruction and data simultaneously (since they share the same bus).

This limitation is often known as ‘von Neumann Bottleneck’ as it impacts the performance of the system.

The Motorola 68HC11 is a popular Microcontroller that uses the von Neumann Architecture.

Harvard Architecture

You might have guessed what would be the structure in Harvard Architecture (the name is not associated with Harvard University but rather a relay-based computer Harvard Mark-I).

In Harvard Architecture, the computer system has two physically separate memory storage to hold instructions and data. Since the system has physically separate memory units, it means the buses are also physically separate.

Harvard-Architecture

The Data Memory has its own set of Data and Address Buses while the Program Memory has a separate set of Data and Address Buses.

Harvard Architecture has a major advantage when it comes to the speed of executing instructions as the CPU now can access both program memory and data memory simultaneously. This means fewer instruction cycles for executing instructions (in comparison with von Neumann Architecture) at the cost of increased hardware complexity.

The MCS-51 or the 8051 Microcontroller is a popular example that uses Harvard Architecture.

General Microcontroller Architecture

In its simplest form, a Microcontroller must have a CPU, a memory unit, and input/output.

The CPU is the brain of a Microcontroller. It consists of an ALU, that will perform all the arithmetic and logical computations, and a Control Unit, that controls all the internal operations of the CPU.

Memory is another important part of a Microcontroller. There are usually two types of memories: Program Memory and Data Memory. Program Memory, as the name suggests, stores the program code (essentially, all the instructions to the CPU). It is a Read-only Memory (ROM). EPROM and Flash are the two popular types of program memory types.

Data Memory, on the other hand, acts as a temporary storage for data while the CPU is executing instructions. It is a Read/Write Memory (RAM).

The main idea behind the development of a Microcontroller is that there must be an easy way for the CPU to interact with the external components, peripherals, and the outside world. This is where the input/output ports of a Microcontroller come into play.

8051 Microcontroller Architecture

With that information on the basics of computer architectures and types of microcontroller architectures, let us now proceed to the 8051 Microcontroller Architecture.

The following image shows the 8051 Microcontroller Architecture at a block-level. If you compare this with the ‘General Microcontroller Architecture’ that we saw in the previous section, you can see a lot of similarities.

8051-Microcontroller-Architecture

Processor

The heart of the 8051 Microcontroller is the 8-bit ALU (Arithmetic and Logic Unit). It performs all the arithmetic (addition, subtraction, multiplication, division) and logical operations (AND, OR, NAND, NOR, XOR, etc.) on the data and stores the result in the Accumulator (ACC). It uses two temporary registers (TMP1 and TMP2) while executing instructions. These registers are not available for user access.

The width of the Internal Data Bus is 8-bit. This bus is responsible for all the communication between the processor and the rest of the peripherals.

The Timing and Control Unit, apart from taking care of the clock-related stuff, also has the Instruction Decoder Unit. The Control Unit fetches instructions from the Program Memory (ROM) and loads them in the Instruction Decoder Register. As the name suggests, the Instruction Decoder will decode the instructions and initiate a sequence of events for the rest of the CPU to follow.

Like TMP1 and TMP2, even the Instruction Register isn’t available for user access.

The Timing Unit is responsible for generating necessary clock and control signals for proper communication between the processor and the peripherals.

Memory

We will take a closer look at the 8051 Microcontroller Memory Organization in a future guide. For the time being, we know that the 8051 Microcontroller has both Program Memory and Data Memory. Modern versions of the 8051 Microcontroller come with Flash-type program memory.

The Program Memory is non-volatile i.e., even when there is no power to the microcontroller, it retains the data (program code). Original 8051 Microcontroller had 4KB of Program Memory. A modern 8052 Microcontroller comes with 8KB Flash.

Coming to the Data Memory, the original 8051 Microcontroller has just 128B of RAM while the 8052 has 256B of RAM. In contrast to program memory, data memory is volatile i.e., it loses data when we remove power.

An important part of the RAM of the 8051 Microcontroller are the Special Function Register or SFRs. We can control the operation of different peripherals of the 8051 Microcontroller by using these SFRs. Some SFRs include the Accumulator (A), B Register, PSW (Program Status Word), DPTR (Data Pointer), Stack Pointer, PCON (Power Control), etc.

I have created a dedicated guide on 8051 Microcontroller Special Function Registers (SFRs).

I/O Ports

We know from the previous guides that the 8051 Microcontroller has four I/O Ports (P0, P1, P2, P3) with 8 pins each. You can see how these ports are connected internally through a latch (which is nothing but the Port SFR) and corresponding drivers.

8051 Microcontroller Architecture Features

Here’s a simple overview of all the important features of the 8051 Microcontroller Architecture:

  • 8-Bit ALU with 8-Bit Internal Bus and two Registers (A and B).
  • Program Memory of 4KB in the original 8051 but 8KB is 8052 (AT89S52). Flash-type ROM in current 8051 models with support for in-system programming (ISP).
  • Originally 128B of RAM but bumped to 256B in 8052. It includes four register banks, bit addressable registers, general purpose registers, and special function registers (SFRs).
  • Apart from Program Counter (PC) and Data Pointer (DPTR), all the other registers are 8-bit (these two are 16-bit registers).
  • Four I/O Ports (P0 through P3) each with 8 Bidirectional I/O Pins.
  • Has two 16-bit Timer/Counter Blocks.
  • A Full Duplex Serial Port for UART Communication.
  • Control Registers include: SCON, PCON, TCON, IP, IE, TMOD, SBUF.
  • Total five Interrupts (two external and three internal).
  • On-chip Oscillator with a popular choice being 12MHz (or 11.0592MHz) Clock.

NOTE: The values of the RAM and ROM will vary from one variant to the other. So does the list of peripherals. Always check the manufacturer’s data sheet for accurate information.

Conclusion

As you saw from this guide, the Architecture of the 8051 Microcontroller is rather simple. It doesn’t have all the modern jazz such as a floating point processor, DMA, Cache, etc. But it is still capable of implementing several embedded system applications.

Once you learn the 8051 Microcontroller Memory Organization and its Special Function Registers (SFRs), you will have a better understanding of the 8051 Microcontroller Architecture. Check those guides as well.  

This was a brief introduction to 8051 Microcontroller. In the upcoming guides, I will talk more about the different components and features of the 8051 Microcontroller.

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